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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal Bus Buffer
With 5V-Tolerant Inputs
The MC74LVX244 is an advanced high speed CMOS non-inverting 3-state octal bus buffer and has two active low output enables. It is also designed to work with 3-state memory address drivers, etc. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.
MC74LVX244
* * * * * * * *
High Speed: tPD = 4.7ns (Typ) at VCC = 3.3V Low Power Dissipation: ICC = 4A (Max) at TA = 25C Power Down Protection Provided on Inputs Balanced Propagation Delays Low Noise: VOLP = 0.8V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300mA ESD Performance: HBM > 2000V; Machine Model > 200V
VCC 20 2OE 19 1O0 18 2D0 17 1O1 16 2D1 15 1O2 14 2D2 13 1O3 12 2D3 11
LOW-VOLTAGE CMOS
LVX
DW SUFFIX 20-LEAD SOIC PACKAGE CASE 751D-04 DT SUFFIX 20-LEAD TSSOP PACKAGE CASE 948E-02
1 1OE
2 1D0
3 2O0
4 1D1
5 2O1
6 1D2
7 2O2
8 1D3
9 2O3
10 GND M SUFFIX 20-LEAD SOIC EIAJ PACKAGE CASE 967-01
Figure 1. 20-Lead Pinout (Top View)
1OE
1
2OE 2 18
19
PIN NAMES
17 3 2O0 Pins nOE 1Dn, 2Dn 1On, 2On Function Output Enable Inputs Data Inputs 3-State Outputs
1D0
1O0
2D0
1D1
4
16
1O1
2D1
15
5
2O1
1D2
6
14
1O2
2D2
13
7
2O2
FUNCTION TABLE
INPUTS OUTPUTS 1On, 2On L H Z
1D3
8
12
1O3
2D3
11
9
2O3
1OE, 2OE L L H
1Dn, 2Dn L H X
Figure 2. Logic Diagram
6/97
(c) Motorola, Inc. 1997
1
REV 0
II I I I I I II II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II II I I II I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II II I I II I I I I I I I I I II II I I I I I II II I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II II I I I I I II II I I II II I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II II I II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I II II I I II II I II II I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I II II I I II II I I I II I II I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I III I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I II I I III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III I
Tstg Storage Temperature -65 to +150 _C * Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute-maximum-rated conditions is not implied.
II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
MAXIMUM RATINGS*
DC ELECTRICAL CHARACTERISTICS
RECOMMENDED OPERATING CONDITIONS
MC74LVX244
ICC
IOZ
Iin
VOL
VOH
VIL
VIH
t/V
TA
Vout
Vin
VCC
PD
ICC
Iout
IOK
IIK
Vout
Vin
VCC
MOTOROLA Symbol S bl Symbol Symbol Quiescent Supply Current Maximum Three-State Leakage Current Input Leakage Current Low-Level Output Voltage (Vin = VIH or VIL) High-Level Output Voltage (Vin = VIH or VIL) Low-Level Input Voltage High-Level Input Voltage Input Rise and Fall Time Operating Temperature, All Package Types DC Output Voltage DC Input Voltage DC Supply Voltage Power Dissipation DC Supply Current, VCC and GND Pins DC Output Current, per Pin Output Diode Current Input Diode Current DC Output Voltage DC Input Voltage DC Supply Voltage Parameter P IOL = 50A IOL = 50A IOL = 4mA IOH = -50A IOH = -50A IOH = -4mA Vin = VCC or GND Vin = VIL or VIH Vout = VCC or GND Vin = 5.5V or GND Test C di i T Conditions Parameter Parameter
VCC V
3.6
3.6
3.6
2.0 3.0 3.0
2.0 3.0 3.0
2.0 3.0 3.6
2.0 3.0 3.6
2 1.9 2.9 2.58 Min 1.5 2.0 2.4 TA = 25C Typ 0.0 0.0 2.0 3.0 0.25 0.1 Max 0.1 0.1 0.36 4.0 0.5 0.8 0.8 1.9 2.9 2.48 Min 1.5 2.0 2.4 Min -40 2.0 0 0 0
TA = - 40 to 85C
-0.5 to VCC +0.5
-0.5 to +7.0
-0.5 to +7.0
Value
180
75
25
20
-20
LCX DATA BR1339 -- REV 3 40.0 2.5 100 0.5 0.8 0.8 5.5 3.6 1.0 Max +85 0.1 0.1 0.44 VCC Max ns/V Unit Ui Unit Unit mW mA mA mA mA A A A
_C
V V V V V V V V V V
MC74LVX244
II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I I II I I I I I I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIII I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I I II II I II II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I II II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I I I I II I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I I II II I I I I I I II II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I II II I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I I I I I I II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIII I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I II II I I II I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns)
Symbol S bl Parameter P TA = 25C Typ 6.1 8.6 4.7 7.2 7.1 9.6 5.5 8.0 TA = - 40 to 85C Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max Test C di i T Conditions Min Max Unit Ui ns tPLH, tPHL Propagation Delay Input to Output VCC = 2.7V CL = 15pF CL = 50pF CL = 15pF CL = 50pF 11.4 14.9 13.5 17.0 VCC = 3.3 0.3V VCC = 2.7V RL = 1k 7.1 10.6 8.5 12.0 tPZL, tPZH Output Enable Time to High and Low Level CL = 15pF CL = 50pF CL = 15pF CL = 50pF 13.8 17.3 16.5 20.0 10.5 14.0 19.0 13.0 1.5 1.5 ns VCC = 3.3 0.3V RL = 1k VCC = 2.7V RL = 1k 8.8 12.3 tPLZ, tPHZ Output Disable Time From High and Low Level CL = 50pF CL = 50pF 11.6 9.7 16.0 11.4 1.5 1.5 ns VCC = 3.3 0.3V RL = 1k VCC = 2.7V VCC = 3.3 0.3V tOSHL tOSLH Output-to-Output Skew (Note NO TAG) CL = 50pF CL = 50pF ns 1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH); parameter guaranteed by design.
CAPACITIVE CHARACTERISTICS
TA = 25C Typ 4 6
TA = - 40 to 85C Min Max 10
Symbol S bl
Parameter P
Min
Max 10
Unit Ui pF pF pF
Cin
Input Capacitance
Cout
Maximum Three-State Output Capacitance
CPD
Power Dissipation Capacitance (Note NO TAG)
19
2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC / 8 (per bit). CPD is used to determine the no-load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 3.3V, Measured in SOIC Package)
Symbol S bl VOLP VOLV VIHD VILD Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum High Level Dynamic Input Voltage Maximum Low Level Dynamic Input Voltage Characteristic Ch ii
TA = 25C Typ 0.5 -0.5 Max 0.8 -0.8 2.0 0.8 Unit Ui V V V V
LCX DATA BR1339 -- REV 3
3
MOTOROLA
MC74LVX244
SWITCHING WAVEFORMS
VCC 1OE, 2OE 50% GND GND tPLH 1On, 2On 50% VCC tPHL 1On, 2On tPZL 50% VCC tPZH 1On, 2On 50% VCC tPHZ tPLZ HIGH IMPEDANCE VOL +0.3V VOH -0.3V HIGH IMPEDANCE
1Dn, 2Dn 50%
VCC
Figure 3.
Figure 4.
TEST CIRCUITS
TEST POINT OUTPUT DEVICE UNDER TEST DEVICE UNDER TEST TEST POINT OUTPUT 1 k CONNECT TO VCC WHEN TESTING tPLZ AND tPZL. CONNECT TO GND WHEN TESTING tPHZ AND tPZH.
CL*
CL*
* Includes all probe and jig capacitance
* Includes all probe and jig capacitance
Figure 5. Propagation Delay Test Circuit
Figure 6. Three-State Test Circuit
MOTOROLA
4
LCX DATA BR1339 -- REV 3
MC74LVX244
OUTLINE DIMENSIONS
DW SUFFIX PLASTIC SOIC PACKAGE CASE 751D-04 ISSUE E
-A-
20 11 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.150 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 12.65 12.95 7.40 7.60 2.35 2.65 0.35 0.49 0.50 0.90 1.27 BSC 0.25 0.32 0.10 0.25 0_ 7_ 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.499 0.510 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 BSC 0.010 0.012 0.004 0.009 0_ 7_ 0.395 0.415 0.010 0.029
-B-
1 10
10X
P 0.010 (0.25)
M
B
M
20X
D
M
0.010 (0.25)
TA
S
B
J
S
F R X 45 _ C -T-
18X SEATING PLANE
G
K
M
DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948E-02 ISSUE A
20X
K REF
M
0.15 (0.006) T U
S
0.10 (0.004)
TU
S
V
S
2X
L/2
20
11
L
PIN 1 IDENT 1 10
B -U-
J J1
N 0.15 (0.006) T U
S
A -V- N F
C D 0.100 (0.004) -T- SEATING
PLANE
G
H
DETAIL E
LCX DATA BR1339 -- REV 3
5
IIII IIII IIII
SECTION N-N 0.25 (0.010) M DETAIL E
K K1
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
-W-
DIM A B C D F G H J J1 K K1 L M
MOTOROLA
MC74LVX244
OUTLINE DIMENSIONS
M SUFFIX PLASTIC SOIC EIAJ PACKAGE CASE 967-01 ISSUE O
NOTES: 1 DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION: MILLIMETER. 3 DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4 TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5 THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.18 0.27 12.35 12.80 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 0.81 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.486 0.504 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.032
20
11
LE Q1 M_ L DETAIL P
E HE
1
10
Z D e VIEW P A
c
b 0.13 (0.005)
M
A1 0.10 (0.004)
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MOTOROLA 6
MC74LVX244/D LCX DATA BR1339 -- REV 3

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